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| NLX1G97 Configurable Multifunction Gate The NLX1G97 MiniGatet is an advanced high-speed CMOS multifunction gate. The device allows the user to choose logic functions MUX, AND, OR, NAND, NOR, INVERT and BUFFER. The device has Schmitt-trigger inputs, thereby enhancing noise immunity. The NLX1G97 input and output structures provide protection when voltages up to 7.0 V are applied, regardless of the supply voltage. Features http://onsemi.com MARKING DIAGRAMS ULLGA6 1.0 x 1.0 CASE 613AD * * * * * * * High Speed: tPD = 3.3 ns (Typ) @ VCC = 5.0 V Low Power Dissipation: ICC = 1 mA (Maximum) at TA = 25C Power Down Protection Provided on inputs Balanced Propagation Delays Overvoltage Tolerant (OVT) Input and Output Pins Ultra-Small Packages These are Pb-Free Devices M F 1 1 ULLGA6 1.2 x 1.0 CASE 613AE M F ULLGA6 1.45 x 1.0 CASE 613AF 1 F M M = Specific Device Code = Date Code F PIN ASSIGNMENTS IN B GND IN A 1 2 3 6 5 4 (Top View) IN C VCC OUT Y ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. (c) Semiconductor Components Industries, LLC, 2008 1 March, 2008 - Rev. 0 Publication Order Number: NLX1G97/D NLX1G97 IN A OUT Y IN B IN C Figure 1. Function Diagram PIN ASSIGNMENT 1 2 3 4 5 6 IN B GND IN A OUT Y VCC IN C A L L L L H H H H FUNCTION TABLE* Input B L L H H L L H H C L H L H L H L H Output Y L L H L L H H H *To select a logic function, please refer to "Logic Configurations section". http://onsemi.com 2 NLX1G97 LOGIC CONFIGURATIONS VCC B Y A C A B 1 2 3 6 5 4 Y C A C Y A 1 2 3 6 5 4 Y VCC C Figure 2. 2-Input MUX Figure 3. 2-Input AND (When B = "L") VCC VCC A C A C Y A Y 1 2 3 6 5 4 Y C B C B C Y B 1 2 3 Y 6 5 4 Y C Figure 4. 2-Input OR with Input C Inverted (When B = "H") VCC Figure 5. 2-Input AND with Input C Inverted (When A = "L") VCC B C B Y 1 2 3 6 5 4 C C Y Y 1 2 3 6 5 4 C Y Figure 6. 2-Input OR (When A ="H") Figure 7. Inverter (When A = "L" and B = "H") VCC B B Y 1 2 3 6 5 4 Y Figure 8. Buffer (When A = C = "L") http://onsemi.com 3 NLX1G97 MAXIMUM RATINGS Symbol VCC VIN VOUT IIK IOK IO ICC IGND TSTG TL TJ MSL FR VESD DC Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Source/Sink Current DC Supply Current Per Supply Pin DC Ground Current per Ground Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature Under Bias Moisture Sensitivity Flammability Rating Oxygen ESD Withstand Voltage Index: 28 to 34 Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) VIN < GND VOUT < GND Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -50 -50 $50 $100 $100 -65 to +150 260 150 Level 1 UL 94 V-0 @ 0.125 in >2000 >200 N/A $500 V Unit V V V mA mA mA mA mA C C C ILATCHUP Latchup Performance Above VCC and Below GND at 125C (Note 5) mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm-by-1 inch, 2 ounce copper trace no air flow. 2. Tested to EIA/JESD22-A114-A. 3. Tested to EIA/JESD22-A115-A. 4. Tested to JESD22-C101-A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN VOUT TA Dt/DV Positive DC Supply Voltage Digital Input Voltage Output Voltage Operating Free-Air Temperature Input Transition Rise or Fall Rate VCC = 2.5 V $ 0.2 V VCC = 3.3 V $ 0.3 V VCC = 5.0 V $ 0.5 V Parameter Min 1.65 0 0 -55 0 0 0 Max 5.5 5.5 5.5 +125 No Limit No LImit No Limit Unit V V V C nS/V http://onsemi.com 4 NLX1G97 DC ELECTRICAL CHARACTERISTICS TA = 255C Min 0.79 1.11 1.5 2.16 2.61 0.35 0.58 0.84 1.41 1.78 0.30 0.40 0.53 0.71 0.8 VCC - 0.1 Typ Max 1.16 1.56 1.87 2.74 3.33 0.62 0.87 1.19 1.9 2.29 0.62 0.8 0.87 1.04 1.2 0.35 0.58 0.84 1.41 1.78 0.30 0.40 0.53 0.71 0.8 VCC - 0.1 0.62 0.8 0.87 1.04 1.2 TA v +855C Min Max 1.16 1.56 1.87 2.74 3.33 0.35 0.58 0.84 1.41 1.78 0.30 0.40 0.53 0.71 0.8 VCC - 0.1 0.62 0.8 0.87 1.04 1.2 V V TA = -555C to +1255C Min Max 1.16 1.56 1.87 2.74 3.33 V Unit V Symbol VT+ Parameter Positive Threshold Voltage Conditions VCC (V) 1.65 2.3 3.0 4.5 5.5 VT- Negative Threshold Voltage 1.65 2.3 3.0 4.5 5.5 VH Hysteresis Voltage 1.65 2.3 3.0 4.5 5.5 VOH Minimum High-Level Output Voltage VIN = VT-MIN or VT+MAX IOH = -50 mA VIN = VT-MIN or VT+MAX IOH = -4 mA IOH = -8 mA IOH = -16 mA IOH = -24 mA IOH = -32 mA 1.65 5.5 1.65 2.3 3.0 3.0 4.5 1.65 5.5 1.2 1.9 2.4 2.3 3.8 0.1 1.2 1.9 2.4 2.3 3.8 0.1 1.2 1.9 2.4 2.3 3.8 0.1 V VOL Maximum Low-Level Output Voltage VIN = VT-MIN or VT+MAX IOL = 50 mA VIN = VT-MIN or VT+MAX IOL = 4 mA IOL = 8 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA 1.65 2.3 3.0 3.0 4.5 0 to 5.5 5.5 0.45 0.3 0.4 0.55 0.55 $0.1 0.45 0.3 0.4 0.55 0.55 $1.0 0.45 0.3 0.4 0.55 0.55 $1.0 mA IIN Input Leakage Current Quiescent Supply Current 0 v VIN v 5.5 V ICC 0 v VIN v VCC 1.0 10 10 mA http://onsemi.com 5 NLX1G97 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) TA = 255C Symbol tPLH, tPHL Parameter Propagation Delay, Any Input to Output Y (See Test Circuit) VCC (V) 1.65 - 1.95 2.3 - 2.7 3.0 - 3.6 4.5 - 5.5 CIN CPD Input Capacitance Power Dissipation Capacitance (Note 6) 5.0 f = 10 MHz Test Condition Min 3.2 2.0 1.5 1.1 Typ 8.6 5.1 3.9 3.3 3.5 22 Max 14.4 8.3 6.3 5.1 TA v +855C Min 3.2 2.0 1.5 1.1 Max 14.4 8.3 6.3 5.1 TA = -555C to +1255C Min 3.2 2.0 1.5 1.1 Max 14.4 8.3 6.3 5.1 pF pF Unit ns 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the dynamic operating current consumption without load. Average operating current can be obtained by the equation ICC(OPR) = CPD * VCC * fin + ICC. CPD is used to determine the no-load dynamic power consumption: PD = CPD * VCC2 * fin + ICC * VCC. TEST CIRCUIT AND VOLTAGE WAVEFORMS From Output Under Test RL VLOAD Open GND CL * RL Test tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open VLOAD GND *CL includes probes and jig capacitance. Figure 9. Load Circuit Inputs VCC 1.8 V $ 0.15 V 2.5 V $ 0.2 V 3.3 V $ 0.3 V 5.5 V $ 0.5 V VI VCC VCC 3V VCC tr/tf v 2 ns v 2 ns v 2.5 ns v 2.5 ns VM VCC/2 VCC/2 1.5 V VCC/2 VLOAD 2 x VCC 2 x VCC 6V 2 x VCC CL 30 pF 30 pF 50 pF 50 pF RL 1 kW 500 W 500 W 500 W VD 0.15 V 0.15 V 0.3 V 0.3 V http://onsemi.com 6 NLX1G97 tW Input VM VM 0V Data Input Timing Input VI tsu VM th VM VM VI 0V VI 0V Figure 10. Voltage Waveforms Pulse Duration VI VM tPLH Output tPHL Output VM VM VM tPHL VM tPLH VM VOH VOL 0V VOH VOL Figure 11. Voltage Waveforms Setup and Hold Times Output Control Output Waveform 1 S1 at VLOAD (Note 7) tPZH Output Waveform 2 S1 at GND (Note 8) VM VM VM VI 0V VLOAD/2 VOL + VD VOL tPHZ VOH VOH - VD [0 V Input VM Figure 12. Voltage Waveforms Propagation Delay Times Inverting and Noninverting Outputs Figure 13. Voltage Waveforms Enable and Disable Times Low- and High-Level Enabling 7. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. 8. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control 9. All input pulses are supplied by generators having the following characteristics: PRR v 10 MHz, ZO = 50 W. 10. The outputs are measured one at a time, with one transition per measurement. 11. All parameters are waveforms are not applicable to all devices. ORDERING INFORMATION Device NLX1G97AMX1TCG NLX1G97BMX1TCG NLX1G97CMX1TCG Package ULLGA6 - 0.5P (Pb-Free) ULLGA6 - 0.4P (Pb-Free) ULLGA6 - 0.35P (Pb-Free) Shipping 3000 / Tape & Reel 3000 / Tape & Reel 3000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 7 NLX1G97 PACKAGE DIMENSIONS ULLGA6 1.0x1.0, 0.35P CASE 613AD-01 ISSUE A D A B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. DIM A A1 b D E e L L1 SEATING PLANE MILLIMETERS MIN MAX --0.40 0.00 0.05 0.12 0.22 1.00 BSC 1.00 BSC 0.35 BSC 0.25 0.35 0.30 0.40 PIN ONE REFERENCE 0.10 C 0.10 C 0.05 C 6X 0.05 C L1 0.53 6 4 6X EE EE EE 1 E TOP VIEW A SIDE VIEW A1 e 5X 3 MOUNTING FOOTPRINT SOLDERMASK DEFINED* 5X C 0.48 6X 0.22 L NOTE 4 1.18 1 PKG OUTLINE 0.35 PITCH DIMENSIONS: MILLIMETERS b 0.10 C A B 0.05 C NOTE 3 BOTTOM VIEW *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 8 NLX1G97 PACKAGE DIMENSIONS ULLGA6 1.2x1.0, 0.4P CASE 613AE-01 ISSUE A D A B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. DIM A A1 b D E e L L1 SEATING PLANE MILLIMETERS MIN MAX --0.40 0.00 0.05 0.15 0.25 1.20 BSC 1.00 BSC 0.40 BSC 0.25 0.35 0.35 0.45 PIN ONE REFERENCE 0.10 C 0.10 C 0.05 C 6X 0.05 C L1 1 PKG OUTLINE EE EE EE 1 6 E TOP VIEW A SIDE VIEW A1 C MOUNTING FOOTPRINT SOLDERMASK DEFINED* 5X 0.49 e 5X 6X 0.26 L NOTE 4 3 1.24 0.53 4 6X b 0.10 C A B 0.05 C NOTE 3 0.40 PITCH DIMENSIONS: MILLIMETERS BOTTOM VIEW *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 9 NLX1G97 PACKAGE DIMENSIONS ULLGA6 1.45x1.0, 0.5P CASE 613AF-01 ISSUE A D A B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. DIM A A1 b D E e L L1 MILLIMETERS MIN MAX --0.40 0.00 0.05 0.15 0.25 1.45 BSC 1.00 BSC 0.50 BSC 0.25 0.35 0.30 0.40 PIN ONE REFERENCE 0.10 C 0.10 C 0.05 C 6X 0.05 C L1 1 PKG OUTLINE MiniGate is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative EEE EEE EEE 1 6 E TOP VIEW A SIDE VIEW A1 e 5X 3 SEATING PLANE MOUNTING FOOTPRINT SOLDERMASK DEFINED* 5X C 0.49 6X 0.30 L NOTE 4 1.24 0.53 4 6X b 0.10 C A B 0.05 C NOTE 3 0.50 PITCH DIMENSIONS: MILLIMETERS BOTTOM VIEW *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 10 NLX1G97/D |
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